Achievements:
Publications:
Maroun, Emad Jacob, Martin Schoeberl, and Peter Puschner. ” Two-Step Register Allocation for Implementing Single-Path Code.” 2024 IEEE 27th International Symposium on Real-Time Distributed Computing (ISORC). IEEE, 2024.
Maroun, Emad Jacob, Martin Schoeberl, and Peter Puschner. “Compiler-directed constant execution time on flat memory systems.” 2023 IEEE 26th International Symposium on Real-Time Distributed Computing (ISORC). IEEE, 2023. Source: https://ieeexplore.ieee.org/abstract/document/10197044
Maroun, Emad Jacob, Martin Schoeberl, and Peter Puschner. “Constant-Loop Dominators for Single-Path Code Optimization.” 21th International Workshop on Worst-Case Execution Time Analysis (WCET 2023). Schloss Dagstuhl-Leibniz-Zentrum für Informatik, 2023. Source: https://drops.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2023.7
Maroun, Emad Jacob, Martin Schoeberl, and Peter Puschner. “Compiling for time-predictability with dual-issue single-path code.” Journal of Systems Architecture 118 (2021): 102230. Source: https://www.sciencedirect.com/science/article/pii/S1383762121001594
Maroun, Emad Jacob, Martin Schoeberl, and Peter Puschner. “Towards dual-issue single-path code.” 2020 IEEE 23rd International Symposium on Real-Time Distributed Computing (ISORC). IEEE, 2020. Source: https://ieeexplore.ieee.org/abstract/document/9112901
In Peer-Review:
Maroun, Emad Jacob, Martin Schoeberl, and Peter Puschner. “Predictable and Optimized Single-Path Code for Predicated Processors.” Available at SSRN 4714767. Preprint: https://papers.ssrn.com/sol3/papers.cfm?abstract_id=4714767
Dissertation
Title: Compiling for Time-Predictability and Performance
Abstract:
Single-path is a code-generation technique to disconnect a program’s execution time from run-time conditions. Full time-predictability means programs have a constant execution time, which, when coupled with sufficient performance, can replace static worst-case execution time analysis in the design process for a real-time system. This cumulative dissertation collates six works improving the time-predictability and performance of single-path code. Constant execution times are achieved by compensating for varying access times to main memory. Performance is improved by optimizing code that is executed a fixed number of times, by more efficient use of dual-issue processor pipelines, and by enabling the use of generic register allocators for allocating predicate registers. This dissertation also discusses how the challenges of correctness and practicality require this type of research to use the scientific method to advance the state of the art. The selected papers are put into context before evaluating the end-to-end cumulative performance impacts. In addition to achieving constant execution times on a time-predictable processor, the results show varying but significant improvements of up to 145% in performance and a reduced code size of up to 28%.